Iei-integration IMB-H610A Bedienungsanleitung Seite 123
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IMB-H610 Micro-ATX Motherboard
Page 108
Disabled
Disables Resume on Ring option
Enabled DEFAULT
Enables Resume on Ring option
Resume on PS/2 [Enabled]
Use the Resume on PS/2 option to enable or disable resuming from PS/2 activation.
Disabled
Disables Resume on PS/2 option
Enabled DEFAULT
Enables Resume on PS/2 option
Azalia HD Aud io [Enabled]
Use the Azalia HD Audio option to enable or disable the High Definition Audio controller.
Disabled
The onboard High Definition Audio controller is disabled
Enabled DEFAULT
The onboard High Definition Audio controller is detected
automatically and enabled
Azalia internal HDMI codec [Dis abled]
Use the Azalia internal HDMI codec option to enable or disable the internal HDMI codec
for High Definition Audio.
Disabled DEFAULT
Disables the internal HDMI codec for High Definition Audio
Enabled
Enables the internal HDMI codec for High Definition Audio
PCIe x4 Slot [Enabled]
Use the PCIe x4 Slot option to enable or disable the PCI Express x4 Slot.
Disabled
Disables the PCIe x4 Slot
Enabled DEFAULT
Enables the PCIe x4 Slot
PCIe LAN Controller [Enabled]
Use the PCIe LAN Controller option to enable or disable the PCI Express LAN controller.
- IMB-H610 1
- Revis ion 2
- Copyright 3
- Table of Contents 4
- Lis t of Figures 9
- Page xi 11
- Page xii 12
- Lis t of Tables 13
- Page xiv 14
- BIOS Me n u s 15
- 1 Introduction 16
- 1.1 Introduction 17
- 1.2 Model Variations 17
- 1.3 Benefits 18
- 1.4 Features 18
- 1.5 Connectors 19
- 1.6 Dimensions 20
- 1. Data Flow 21
- 1.8 Technical Specifications 22
- 2 Packing Lis t 24
- 2.1 Anti-static Precautions 25
- 2.2 Unpacking Precautions 25
- 2.3 Packing Lis t 26
- 2.4 Optional Items 27
- Page 13 28
- 3 Connectors 29
- Page 16 31
- CN Label: BAT1 33
- PIN NO. DESCRIPTION 35
- 2 +12V 35
- 3 FANIO1 35
- 3 +12V 36
- 4 +12V 36
- Page 22 37
- 3.2.6 Debug Port Connector 37
- Pin Description 42
- 1 +5V_DUAL 42
- 2 PCH_GP38_PU 42
- 3 PCH_GP39_PU 42
- 1 +12 V 43
- 4 +5 V 43
- 1 RXD485# 2 RXD485 46
- 3 TXD485 4 TXD485# 46
- Page 32 47
- Page 33 48
- 3.2.17 SMBus Connector 48
- PIN DESCRIPTION 49
- 2 SMBCLK_RESUME 49
- 3 SMBDATA_RESUME 49
- 1 +3.3V 2 GND 50
- 3 CS0 4 CLK 50
- 5 SO0 6 SI 50
- 7 NC 8 NC 50
- 2 VCC12 51
- Page 39 54
- 3.3.1 Audio Connector 54
- Page 40 55
- Page 41 56
- Page 44 59
- Page 45 60
- 4 Ins tallation 61
- 4.1 Anti-static Precautions 62
- Page 48 63
- WARNING: 63
- 4.3 Bas ic Ins tallation 64
- Page 50 65
- Page 51 66
- Page 53 68
- Page 54 69
- 4.3.3 DIMM Ins tallation 69
- Setting Description 71
- Closed ATX Mode (Default) 71
- Open AT Mode 71
- 2-3 Clear CMOS Setup 72
- Short 1-2 +5V 73
- Page 59 74
- Page 60 75
- 4.6.1 Audio Connection 75
- Page 61 76
- Page 62 77
- 4.6.3 LAN Connection 77
- Page 63 78
- Page 64 79
- Page 65 80
- 4.6.6 USB Connection 80
- Page 66 81
- 4.6.7 VGA Monitor Connection 81
- Page 67 82
- 5 BIOS 83
- 5.1 Introduction 84
- 5.2 Ma in 86
- 5.3 Advanced 87
- Page 73 88
- 5.3.1 ACP I Settings 88
- Page 77 92
- Page 78 93
- 5.3.4 S ATA Configuration 93
- Page 80 95
- 5.3.6 USB Configuration 95
- Page 89 104
- Page 98 113
- Page 99 114
- 5.4 Chips et 116
- Page 103 118
- DEFAULT 126
- 5.5 Boot 127
- 5.6 Security 128
- 5.7 Save & Exit 129
- Page 115 130
- 6 Software Drivers 131
- 6.2 Software Installation 132
- Page 118 133
- Page 119 134
- Page 120 135
- Page 121 136
- Page 122 137
- Page 123 138
- Page 124 139
- 6.5 LAN Driver Ins tallation 140
- Page 127 142
- Page 128 143
- Page 129 144
- A BIOS Options 145
- Page 131 146
- Page 132 147
- Page 133 148
- B One Key Recovery 149
- Page 135 150
- NOTE: 150
- Windows® 7 7 GB 5 GB 70% 151
- Page 139 154
- B.2.2 Create Partitions 154
- Page 140 155
- Page 141 156
- Page 143 158
- Page 144 159
- Page 146 161
- Page 148 163
- Page 149 164
- Page 150 165
- Page 152 167
- B.4 Recovery Tool Functions 168
- Page 155 170
- B.4.1 Factory Restore 170
- Page 156 171
- B.4.2 Backup System 171
- Page 157 172
- Page 158 173
- B.4.4 Manual 173
- B.5 Other Information 174
- Page 160 175
- Page 161 176
- C Terminology 177
- Page 163 178
- Page 164 179
- Page 165 180
- D Digital I/O In te rface 181
- D.1 Introduction 182
- D.2 DIO Connector Pinouts 182
- Page 168 183
- E Watchdog Timer 184
- Page 170 185
- F Compatibility 187
- F.2 Compatible Processors 188
- G Hazardous Materials 189
- Dis clos ure 189
- Me rc u ry 190
- Page 176 191
- Page 177 192
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