Iei-integration ICE-DB-9S Bedienungsanleitung Seite 126
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ICE Module
If unused, these signals can be left as NC.
Pin Signal PU/PD Series Notes V
B89 VGA_RED PD - Please refer to chapter 4
B91 VGA_GRN PD -
Please refer to chapter 4
B92 VGA_BLU PD -
Please refer to chapter 4
B93 VGA_HSYNC - Buffer
Please refer to chapter 4
B94 VGA_VSYNC - Buffer
Please refer to chapter 4
B95 VGA_I2C_CK PU -
Please refer to chapter 4
B96 VGA_I2C_DAT PU -
Please refer to chapter 4
If unused, these signals can be left as NC.
Pin Signal PU/PD Series Notes V
A71
A72
LVDS_A0+
LVDS_A0-
- - Directly connect to LCD panel
A73
A74
LVDS_A1+
LVDS_A1-
- - Directly connect to LCD panel
A75
A76
LVDS_A2+
LVDS_A2-
- - Directly connect to LCD panel
A78
A79
LVDS_A3+
LVDS_A3-
- - Directly connect to LCD panel
A81
A82
LVDS_A_CK+
LVDS_A_CK-
- - Directly connect to LCD panel
B71
B72
LVDS_B0+
LVDS_B0-
- - Directly connect to LCD panel
B73
B74
LVDS_B1+
LVDS_B1-
- - Directly connect to LCD panel
B75
B76
LVDS_B2+
LVDS_B2-
- - Directly connect to LCD panel
B77
B78
LVDS_B3+
LVDS_B3-
- - Directly connect to LCD panel
B81
B82
LVDS_B_CK+
LVDS_B_CK-
- - Directly connect to LCD panel
A77 LVDS_VDD_EN PD -
Please refer to chapter 4
B79 LVDS_BKLT_EN - -
Please refer to chapter 4
B83 LVDS_BKLT_CTR
L
- -
Please refer to chapter 4
A83 LVDS_I2C_CK PU -
Directly connect to LCD panel
A84 LVDS_I2C_DAT PU
Directly connect to LCD panel
If unused, these signals can be left as NC.
Pin Signal PU/PD Series Notes V
B97 TV_DAC_A PD- -
Please refer to chapter 4
B98 TV_DAC_B PD -
Please refer to chapter 4
B99 TV_DAC_C PD -
Please refer to chapter 4
- ICE Module 1
- Revision 2
- Copyright 3
- Table of Contents 4
- List of Figures 9
- List of Tables 12
- 1 Introduction 14
- 1.1 Introduction 15
- 1.3 Reference Documents 17
- 2 ICE Module Overview 18
- 2.1 Chapter Overview 19
- 2.2 ICE Specifications 20
- 2.2.1 ICE-9152-R10 21
- Page 16 29
- 2.2.5 ICE-GM45A-R10 29
- 2.2.6 ICE-DB-9S-R10 30
- 2.3 Performance 32
- 3 Pin Assignments 33
- 3.1 Chapter Overview 34
- 3.3 Signal Table Terminology 36
- Page 24 37
- 4 Signal Description and 42
- Routing Guideline 42
- Page 30 43
- 4.1.1 Signal Description 43
- 4.1.3 SDVO 46
- AC Coupling Cap 50
- 4.2 PCI Express 51
- 4.2.1 Signal Description 52
- VCC1.5/1A 54
- Page 42 55
- 4.3 PCI 60
- 4.4.1 Signal Description 64
- Page 54 67
- 4.5.1 Signal Description 67
- from Semtech 72
- 4.6 LVDS 74
- 3.3V(Default) 75
- J_VLVDS1 75
- 4.8 Reference Circuit 78
- 4.9 IDE 79
- IDE Connector 80
- CF Connector 81
- 4.10 TV-Out 82
- +V5_KB_R +V5_KB_RR 90
- 4.13 VGA 92
- 4.14 Miscellaneous 95
- CPU FAN W/FAN Control 97
- SYSTEM FAN W/FAN Control 97
- CLEAR CMOS/Super CAP 98
- 5 PCB Stack and 99
- Power Deliver Design 99
- 5.1 Chapter Overview 100
- 5.2 Microstrip or Stripline 100
- 5.3 PCB Stackup Example 100
- Page 90 103
- T0 T1 T2 T3 T4 T5 T6 T7 T8 105
- AT Power 106
- T0 T1 T2 T3 T4 T5 T6 107
- Chapter 108
- 6.1 Chapter Overview 109
- 6.3 Connector Footprint 111
- 6.4 COM Express Form Factors 112
- 6.5 Heat Spread 113
- Page 101 114
- 6.6 Design Notes 116
- Page 104 117
- A ICE Module Design 120
- Schematic Check List 120
- Page 108 121
- Page 109 122
- Page 110 123
- Page 111 124
- Page 112 125
- B Application Notes 129
- B.1 Terminology 130
- B.2 Updating BIOS Version 130
- Page 119 132
- Page 120 133
- Page 121 134
- 6.7.2 Using DOS Command 134
- Page 122 135
- A.1 RTC Overview 136
- B Reference Carrier 137
- Board Schematic 137
- PCI ROUTING 138
- Cover Page 138
- ATX/AT Power 139
- COMExpress 139
- F119 ICE-DB-9S-R10 140
- IEI ELECTRONICS INC 140
- PCI Clock Buffer 141
- PCIE Clock Buffer 141
- Mini PCI Express 142
- Express Card 142
- PCIEX1_Slot1 142
- PCIEX1_Slot2 142
- D23, REQ#0,GNT#0,INT#AB 145
- 7-Segment LED with Common GND 146
- PCIEX1_Slot3 147
- PCIEX1_Slot4 147
- W83627EHG 150
- FLOPPY(only Device A) 152
- Front_Audio 155
- CD_IN(Reserve) 155
- Audio Rear Jack 156
- Audio Rear Header 156
- SPDIF Connector(Reserve) 156
- COM Module 159
- Express Card Module 159
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