Iei-integration ICE-DB-9S Bedienungsanleitung Seite 151
- Seite / 159
- Inhaltsverzeichnis
- LESEZEICHEN
Bewertet. / 5. Basierend auf Kundenbewertungen
+V3. 3
R191 4.7K
Y2
OSC48MHZ_SMD
EN
1
GND
2
VDD
4
OUT
3
R192 33_412
CLK48M_SIO2
LPC_AD23,5,11,13,20
LPC_AD13,5,11,13,20
LPC_AD03,5,11,13,20
LPC_AD33,5,11,13,20
TP66
1
UART_TX6 16
UART_DSR#6 16
UART_RX6 16
UART_DCD#6 16
UART_RTS#6 16
UART_CTS#6 16
UART_DTR#6 16
UART_RI#6 16
Title
Size Document Number Rev
Date: Sheet
of
F119 ICE-DB-9S-R10
1.02
SIO(F81216D)
IEI ELECTRONICS INC.
NO. 29, Chung-Shing Rd.,
Shin-Chi City , Taipei Hsien. Taiwan, R.O.C
TEL:886-2-86916798
FAX:886-2-66160030
14 23Sunday , September 14, 2008
UART_RX3 16
UART_DCD#3 16
UART_DTR#3 16
UART_TX3 16
UART_DSR#3 16
UART_RI#3 16
UART_RTS#3 16
UART_CTS#3 16
UART_DCD#4 16
UART_TX4 16
UART_DSR#4 16
UART_RX4 16
C142
0.1U_4_Y _16V
2
1
UART_RTS#4 16
UART_CTS#4 16
UART_DTR#4 16
UART_RX5 16
UART_DCD#5 16
UART_RI#4 16
UART_CTS#5 16
UART_DTR#5 16
UART_TX5 16
UART_DSR#5 16
UART_RI#5 16
UART_RTS#5 16
R195 4.7K R196 @4.7K
R198 4.7KR197 @4.7K
LPC_AD2
LPC_AD1
LPC_AD3
LPC_AD0
CLK33M_SIO24
ON: Watch Dog Timer enabled and setting
to 10 second when the clock input
is 24Mhz. If the clock input
is 48Mhz , the timer is setting to
5 second.
OFF :disabled.
CB_RESET#3,5,6,10,11,20
F81216_PIN18
(X,ON) : UART 2 Addr:0x2f8 IRQ4
(ON,OFF): UART 2 Addr:0x2e0 IRQ4
(OFF,OFF):UART 2 disabled.
ON: UART 4 Addr:0x2e8 IRQ9
OFF :UART 4 Disabled
F81216_PIN24
F81216_PIN34
F81216_PIN36
F81216_PIN26
ON: UART 3 Addr:0x3e8 IRQ5
OFF :UART 3 Disabled
F81216_PIN42
F81216_PIN44
(X,ON) : UART 1 Addr:0x3f8 IRQ3
(ON,OFF): UART 1 Addr:0x3e0 IRQ3
(OFF,OFF):UART 1 disabled.
PIN41PIN23PIN33
0
0
Entry KeyAddress
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
0x2E/0x2F
0x4e/0x4f
0x2E/0x2F
0x4E/0x4F
1
0x77(D)
0x77
0x4E/0x4F
0x2E/0x2F
0x4e/0x4f
0x2E/0x2F
0x67
0x87
0x87
0xa0
0xa0
R194 @4.7K
ON:1
OFF:0
D:default
0x67
R193 4.7K
+V3. 3
UART_RTS#3
UART_RTS#4
UART_RTS#5
LPC_FRAME#
Default Address: 2E/2F, Entry Key=0X77
LPC_FRAME#3,5,11,13,20
U14
F81216D
GND2
29
VCC2
30
CTS2
31
DSR2
32
RTS2
33
DTR2
34
SIN2
35
SOUT2
36
SIN3
25
SOUT3
26
DCD3
27
RI3
28
I
R
T
X
4
8
I
R
R
X
4
7
R
I
1
4
6
D
C
D
1
4
5
S
O
U
T
1
4
4
S
I
N
1
4
3
D
T
R
1
4
2
R
T
S
1
4
1
D
S
R
1
4
0
C
T
S
1
3
9
R
I
2
3
8
D
C
D
2
3
7
PCIRST
1
WDT
2
GND1
3
LAD3
4
LAD2
5
LAD1
6
LAD0
7
PCICLK
8
LFRAME
9
SERIRQ
10
VCC1
11
CLKIN
12
C
T
S
4
1
3
D
S
R
4
1
4
R
T
S
4
1
5
D
T
R
4
1
6
S
I
N
4
1
7
S
O
U
T
4
1
8
D
C
D
4
1
9
R
I
4
2
0
C
T
S
3
2
1
D
S
R
3
2
2
R
T
S
3
2
3
D
T
R
3
2
4
+V3. 3
C140
0.1U_4_Y _16V
2
1
C141
0.1U_4_Y _16V
2
1
+V3.3
+V3. 3
SERIRQ3,11,13
CLK48M_SIO2
SERIRQ
- ICE Module 1
- Revision 2
- Copyright 3
- Table of Contents 4
- List of Figures 9
- List of Tables 12
- 1 Introduction 14
- 1.1 Introduction 15
- 1.3 Reference Documents 17
- 2 ICE Module Overview 18
- 2.1 Chapter Overview 19
- 2.2 ICE Specifications 20
- 2.2.1 ICE-9152-R10 21
- Page 16 29
- 2.2.5 ICE-GM45A-R10 29
- 2.2.6 ICE-DB-9S-R10 30
- 2.3 Performance 32
- 3 Pin Assignments 33
- 3.1 Chapter Overview 34
- 3.3 Signal Table Terminology 36
- Page 24 37
- 4 Signal Description and 42
- Routing Guideline 42
- Page 30 43
- 4.1.1 Signal Description 43
- 4.1.3 SDVO 46
- AC Coupling Cap 50
- 4.2 PCI Express 51
- 4.2.1 Signal Description 52
- VCC1.5/1A 54
- Page 42 55
- 4.3 PCI 60
- 4.4.1 Signal Description 64
- Page 54 67
- 4.5.1 Signal Description 67
- from Semtech 72
- 4.6 LVDS 74
- 3.3V(Default) 75
- J_VLVDS1 75
- 4.8 Reference Circuit 78
- 4.9 IDE 79
- IDE Connector 80
- CF Connector 81
- 4.10 TV-Out 82
- +V5_KB_R +V5_KB_RR 90
- 4.13 VGA 92
- 4.14 Miscellaneous 95
- CPU FAN W/FAN Control 97
- SYSTEM FAN W/FAN Control 97
- CLEAR CMOS/Super CAP 98
- 5 PCB Stack and 99
- Power Deliver Design 99
- 5.1 Chapter Overview 100
- 5.2 Microstrip or Stripline 100
- 5.3 PCB Stackup Example 100
- Page 90 103
- T0 T1 T2 T3 T4 T5 T6 T7 T8 105
- AT Power 106
- T0 T1 T2 T3 T4 T5 T6 107
- Chapter 108
- 6.1 Chapter Overview 109
- 6.3 Connector Footprint 111
- 6.4 COM Express Form Factors 112
- 6.5 Heat Spread 113
- Page 101 114
- 6.6 Design Notes 116
- Page 104 117
- A ICE Module Design 120
- Schematic Check List 120
- Page 108 121
- Page 109 122
- Page 110 123
- Page 111 124
- Page 112 125
- B Application Notes 129
- B.1 Terminology 130
- B.2 Updating BIOS Version 130
- Page 119 132
- Page 120 133
- Page 121 134
- 6.7.2 Using DOS Command 134
- Page 122 135
- A.1 RTC Overview 136
- B Reference Carrier 137
- Board Schematic 137
- PCI ROUTING 138
- Cover Page 138
- ATX/AT Power 139
- COMExpress 139
- F119 ICE-DB-9S-R10 140
- IEI ELECTRONICS INC 140
- PCI Clock Buffer 141
- PCIE Clock Buffer 141
- Mini PCI Express 142
- Express Card 142
- PCIEX1_Slot1 142
- PCIEX1_Slot2 142
- D23, REQ#0,GNT#0,INT#AB 145
- 7-Segment LED with Common GND 146
- PCIEX1_Slot3 147
- PCIEX1_Slot4 147
- W83627EHG 150
- FLOPPY(only Device A) 152
- Front_Audio 155
- CD_IN(Reserve) 155
- Audio Rear Jack 156
- Audio Rear Header 156
- SPDIF Connector(Reserve) 156
- COM Module 159
- Express Card Module 159
Verwandte Produkte und Handbücher für Hardware Iei-integration ICE-DB-9S
(151 Seiten)© 2020, manymanuals.de. Alle Rechte vorbehalten. | 0.090 s |
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Kommentare zu diesen Handbüchern